Digital Modeling with dsignal

In addition to analog modeling, pyams.lib can support digital behavior modeling using custom signal representations. The dsignal class allows simulation of binary logic and arithmetic operations typically used in digital circuits.

Digital Signal (dsignal)

The dsignal class models a digital signal capable of representing:

• Logic levels: '0', '1'

• Undefined or floating states: 'X', 'Z'

It supports both logical and arithmetic operations, making it suitable for modeling logic gates, ALUs, and control logic.

Key features include:

• Directional ports (in or out)

• Bit-level operations: AND, OR, XOR, NOT

• Arithmetic support: +, -, /, %

• Support for fixed-length bit width

Typical declaration of a digital signal:

A = dsignal("out", "A", "1010", bitwidth=4)

This defines an output signal on port “A” with an initial binary value of 1010 and a fixed width of 4 bits.

Common operations include:

C = A + B      # Arithmetic addition
Y = A & B      # Bitwise AND
Z = ~A         # Bitwise NOT

Digital Function

The digital(self) function is used to define the logical behavior of a digital component (e.g., logic gates). It uses dsignal objects as inputs and outputs and performs signal processing using built-in logic operations.

Example:

class AND(model):
    def __init__(self, In1, In2, Out):
        self.In1 = dsignal('in', In1, '11', bitwidth=2)
        self.In2 = dsignal('in', In2, '11', bitwidth=2)
        self.Out = dsignal('out', Out, bitwidth=2)

    def digital(self):
        self.Out += self.In1 & self.In2
        print(self.Out)

Explanation:

• The inputs are two 2-bit signals, initialized to “11”

• The output is computed as the bitwise AND of the inputs

• The result is stored in self.Out and printed

This pattern allows flexible modeling of digital components and can be extended to build complete digital systems.

Integration in pyams.lib

Although dsignal and digital() are not built-in to pyams.lib, they can be used alongside analog models to co-simulate mixed-signal systems. For example, a control signal generated by a dsignal model can enable or disable an analog current source.

Benefits of digital modeling in this structure:

• Easy integration with analog components

• Reusable digital modules (gates, counters, ALUs)

• Clear separation between logic and computation layers

dsignal and digital() thus form the basis of the digital modeling framework in pyams.lib-based systems.